Low-power chips for AI-based devices
doi:10.1038/nindia.2019.156 Published online 24 November 2019
Researchers from the Indian Institute of Technology in Hyderabad have designed low-power chips that can do simple arithmetic, making them suitable for computation in artificial-intelligence-based portable devices1.
Such chips, they say, could cater to the growing demand in the processing and storing of big data arising from initiatives such as Digital India and others.
Various portable devices, such as speech- and face-recognition systems and remote health-monitoring devices, require constant computation in order to function.
To meet this goal, the scientists created the chips using specific nanomagnets. They then explored these chips’ efficiency in doing simple arithmetic processes such as addition and subtraction.
An arithmetic adder or subtractor is the building block of artificial-intelligence-based computing. The researchers made an extremely tiny device that was able to add or subtract using only four nanomagnets.
Modern chips consume enormous power, requiring a standby power source to maintain their logic states. This is equal to the power consumed by the chips during computation.
The nanomagnet-based device, however, consumed ultra-low power. It requires no standby power to maintain its logic states, making it non-volatile. It could be used to make non-volatile devices, meaning that such devices could even store or process data when power is off.
The researchers say that the magnetic chips would emerge as a potential alternative to traditional computing devices, which face the challenges of ever-increasing demand for data processing speeds that, according to Moore’s Law, need to double every two years.
1. Sivasubhramani, S. et al. Dipole coupled magnetic quantum-dot cellular automata-based efficient approximate nanomagnetic subtractor and adder design approach. Nanotechnology. 31, 025202 (2020)